Linux illegal instruction thread

[realchamp]

Hello. I've seen alot of people reporting in about this lately and I've experienced it myself too.

The problem is known, but not yet solved.

The problem is because your CPU does not support SSE2. And there are no current solution to this issue.

Sources:
http://forums.srcds.com/viewtopic/14473
http://forums.srcds.com/viewtopic/14491

TeamMod,
- realchamp.

[realchamp]

This issue was fixed.

24th april 2011 thread update: Your server will now only start if your CPU has SSE2.

[FloppyDisk1.44]

<vocaltone type="sarcasm">Nice of Valve to reply to my email!</vocaltone>

But I'm glad it's fixed, I'd just about given up hope and moved on!

[WattoDaToydarian]

I am getting this problem with version 42 on my P3 server.
Did the same problem happen again?

[Mathijs]

Same problem here with version 42, but it might be because my processor lacks SSE1 support. Here's my output of cat /proc/cpuinfo: http://pastebin.com/9TygALYt

Can anyone confirm that this problem still persists? And if it would work without any SSE support?

[realchamp]

(04-24-2011, 03:35 AM)Mathijs Wrote:  Same problem here with version 42, but it might be because my processor lacks SSE1 support. Here's my output of cat /proc/cpuinfo: http://pastebin.com/9TygALYt

Can anyone confirm that this problem still persists? And if it would work without any SSE support?

Yes it's the lack of SSE1 support.

I can confirm this.

[meme93]

Up !

I have the same error on a Dual P3 server ...

Can you confirm this bug still exists ?
Is a bug-fix planned by Valve ?

What we can do ?

Thanks a lot !

-> $ cat /proc/cpuinfo

Quote:processor : 0
vendor_id : GenuineIntel
cpu family : 6
model : 8
model name : Pentium III (Coppermine)
stepping : 6
cpu MHz : 998.489
cache size : 256 KB
fdiv_bug : no
hlt_bug : no
f00f_bug : no
coma_bug : no
fpu : yes
fpu_exception : yes
cpuid level : 2
wp : yes
flags : fpu vme de pse tsc msr pae mce cx8 apic mtrr pge mca cmov pse36 mmx fxsr sse
bogomips : 1996.97
clflush size : 32
cache_alignment : 32
address sizes : 36 bits physical, 32 bits virtual
power management:

processor : 1
vendor_id : GenuineIntel
cpu family : 6
model : 8
model name : Pentium III (Coppermine)
stepping : 10
cpu MHz : 998.489
cache size : 256 KB
fdiv_bug : no
hlt_bug : no
f00f_bug : no
coma_bug : no
fpu : yes
fpu_exception : yes
cpuid level : 2
wp : yes
flags : fpu vme de pse tsc msr pae mce cx8 apic mtrr pge mca cmov pse36 mmx fxsr sse
bogomips : 1996.85
clflush size : 32
cache_alignment : 32
address sizes : 36 bits physical, 32 bits virtual
power management:

[realchamp]

There's no official planned fix by Valve, unfortunately.
Unless it has already been fixed? :|

[meme93]

Thx

it seems to be not fixed ... i've installed the last CS:S server (fresh install) on my dual P3 which only supports SSE (and not SSE2) and it crashed.

I just made the same install on another machine (with P4 & SSE2 support) and it works fine
(I think that is the solution : use a newer machine)

Thanks again.

[Stinkyfax]

they have to recompile it with no -sse2 flag, no matter how easy it is for them there is no chance they will do

[realchamp]

(12-01-2011, 01:26 AM)Stinkyfax Wrote:  they have to recompile it with no -sse2 flag, no matter how easy it is for them there is no chance they will do

It's Valve... it could take them a decade to fix this, but it'll only take them 1 day to screw all plugins for SRCDS.

[Stinkyfax]

ah it's not a "fix", they compiled engine with SSE2 feature which "better" vectorizes loops so loops could be run as SIMD pipelined, it's a huge performance boost in those loops, I doubt they have many of such loops but disabling SSE2 will definitely make server work a very bit (maybe even less than 1%, depends on how many vectorizable loops they have) slower. So it will be a downgrade rather than fix, but sure they could compile 2nd version with no SSE2, they just CBA...

[realchamp]

(12-01-2011, 04:20 AM)Stinkyfax Wrote:  ah it's not a "fix", they compiled engine with SSE2 feature which "better" vectorizes loops so loops could be run as SIMD pipelined, it's a huge performance boost in those loops, I doubt they have many of such loops but disabling SSE2 will definitely make server work a very bit (maybe even less than 1%, depends on how many vectorizable loops they have) slower. So it will be a downgrade rather than fix, but sure they could compile 2nd version with no SSE2, they just CBA...

Make an "if" statement to detect SSE version and use the compatible one would be my best solution.